semiconductor

AI Computer ： Nvidia GB10 Grace Blackwell in NVIDIA DGX Spark Package and Main PCB detailed analysis


NVIDIA DGX Spark™	Main PCB

Product outline

The NVIDIA DGX Spark™ is one of the world’s smallest AI supercomputers equipped with the GB10 Grace Blackwell Superchip. Despite its desktop-sized form factor, it delivers up to 1 petaflop of performance and provides a highly efficient system capable of running 200‑billion‑parameter generative AI models locally.
The GB10 Grace Blackwell Superchip is NVIDIA’s latest AI‑focused SoC, announced in 2025, and is an innovative chip that integrates a CPU and GPU to achieve petaflop‑class computing performance.
The GB10 combines the Grace CPU and Blackwell GPU using 2.5D integration technology and features a compact, high‑efficiency package with 128 GB of unified memory.

Report overview

LTEC plans to release the following five reports:

- ⒈Product teardown
  Investigation of key semiconductor and passive components mounted on the PCB
- ⒉L/W measurements of the finest features across all 14 PCB layers
  As an option PCB pattern CAD data will be available
- ⒊Image data for all 12 package layers:
  As an option Package pattern CAD data will be available
- ⒋Cross‑sectional analysis of the PCB and package
- ⒌Chip analysis (top layer, gate layer, and SEM cross‑section of the seal ring)

For more details, please visit the following page

⒈　Product Teardown Report: 25R-0689-1
　Scheduled Release: January 30
- Product teardown process
- Investigation of mounted semiconductor and passive components
- Datasheets (if available)
- Enlarged photos of mounted components such as sockets

２－⒈PCB Layer (14 Layers) Fine Feature L/W Measurement: 25R-0689-2
　Scheduled Release: March 31
- Measurement of minimum line width and line pitch across all 14 layers

２－⒉ Option: CAD Data
　Scheduled Release: March 31
- Identification of power and ground lines
- ODB++, Gerber, etc.

３－⒈ Package Layer (12 Layers) Image Data: 25R-0689-3
　Scheduled Release: February 27
- Wiring information (photos of all 12 layers, line width, line pitch)

３－⒉ Option: CAD Data
　Scheduled Release: March 31
- Identification of power and ground lines
- ODB++, Gerber, etc.

⒋　PCB and Package Cross‑Section Analysis: 25R-0689-4
　Scheduled Release: January 30
- Package X‑ray images
- Cross‑sectional structure
- Layer thickness measurements